74LS139 dual 2-to-4 line decoder/demultiplexer IC
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A TTL-compatible dual decoder/demultiplexer IC that converts two binary inputs into four mutually exclusive active-low outputs (per channel). Ideal for address decoding, memory selection, and digital signal routing in 5V systems.
SAR 5.00
In stock
A TTL-compatible dual decoder/demultiplexer IC that converts two binary inputs into four mutually exclusive active-low outputs (per channel). Ideal for address decoding, memory selection, and digital signal routing in 5V systems.
Key Features
✔ Dual-channel design – Two independent 2:4 decoders in one 16-pin package
✔ Active-low outputs – Simplified interfacing with common active-low components
✔ TTL-compatible – Works with 5V logic (V<sub>CC</sub> = 4.75–5.25V)
✔ Fast operation – 15–24 ns propagation delay
✔ Demultiplexer function – Can route one input signal to four outputs
Technical Specifications
| Parameter | Value |
|---|---|
| Supply Voltage | 4.75V – 5.25V |
| Logic Family | 74LS (Low-power Schottky) |
| Input High Voltage | ≥ 2V |
| Input Low Voltage | ≤ 0.8V |
| Output Current | ±8mA (max) |
| Power Consumption | 10–20mW (static) |
| Operating Temperature | 0°C to +70°C |
| Package Options | 16-pin DIP, SOIC |
Truth Table (Per Decoder)
| Enable (/G) | B | A | Active Output |
|---|---|---|---|
| H (High) | X | X | All Y = H (Inactive) |
| L (Low) | L | L | /Y0 = L |
| L (Low) | L | H | /Y1 = L |
| L (Low) | H | L | /Y2 = L |
| L (Low) | H | H | /Y3 = L |
(X = Don’t Care, L = Low, H = High)
Applications
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Memory Systems
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Address decoding for RAM/ROM chips in 8-bit/16-bit microprocessors.
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Digital Multiplexing
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Signal routing in data acquisition systems.
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Display Control
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Driving 7-segment displays or LED matrices.
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Logic Expansion
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Converting limited GPIOs into multiple control lines (e.g., for relays or sensors).
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Industrial Control
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Equipment selection in automated systems.
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Package Includes :
- 1 x 74LS139 dual 2-to-4 line decoder/demultiplexer IC
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